What (who) is instruction scheduling - definition
Instruction scheduling algorithm; Instruction scheduler; Percolation scheduling; Percolation scheduler; Global scheduling; Global scheduler; Cold scheduling algorithm; Cold scheduling; Cold scheduler; Local scheduling; Local scheduler; Basic block scheduling; Basic block scheduler; Modulo scheduling; Superblock scheduling; Superblock scheduler; Modulo scheduler
instruction scheduling
The compiler phase that orders instructions on a
pipelined, superscalar, or VLIW architecture so as to
maximise the number of function units operating in parallel
and to minimise the time they spend waiting for each other.
Examples are filling a delay slot; interspersing
floating-point instructions with integer instructions to
keep both units operating; making adjacent instructions
independent, e.g. one which writes a register and another which
reads from it; separating memory writes to avoid filling the
write buffer.
Norman P. Jouppi and David W. Wall, {"Available
Instruction-Level Parallelism for Superscalar and
Superpipelined Processors"
(ftp://gatekeeper.dec.com/archive/pub/DEC/WRL/research-reports/WRL-TR-89.7.ps.Z) },
Proceedings of the Third International Conference on
Architectural Support for Programming Languages and Operating
Systems, pp. 272--282, 1989.
[The SPARC Architecture Manual, v8, ISBN 0-13-825001-4 ]
Instruction scheduling
In computer science, instruction scheduling is a compiler optimization used to improve instruction-level parallelism, which improves performance on machines with instruction pipelines. Put more simply, it tries to do the following without changing the meaning of the code:
Scheduling Open Service Interface Definition
AN OPEN KNOWLEDGE INITIATIVE SPECIFICATION; PROGRAMMATIC INTERFACES WHICH COMPRISE A SERVICE-ORIENTED ARCHITECTURE FOR DESIGNING AND BUILDING REUSABLE AND INTEROPERABLE SOFTWARE
Scheduling OSID
The Scheduling Open Service Interface Definition (OSID) is an Open Knowledge Initiative specification. OSIDs are programmatic interfaces which comprise a service-oriented architecture for designing and building reusable and interoperable software.
Wikipedia
Instruction scheduling
In computer science, instruction scheduling is a compiler optimization used to improve instruction-level parallelism, which improves performance on machines with instruction pipelines. Put more simply, it tries to do the following without changing the meaning of the code:
- Avoid pipeline stalls by rearranging the order of instructions.
- Avoid illegal or semantically ambiguous operations (typically involving subtle instruction pipeline timing issues or non-interlocked resources).
The pipeline stalls can be caused by structural hazards (processor resource limit), data hazards (output of one instruction needed by another instruction) and control hazards (branching).
